Software Verification


All phases of the safety lifecycle require to be verified. This is an activity that confirms that all required inputs and outputs of the phase meet the requirements of the lifecycle phase.  This is critical in terms of software for any SIS element, as incorrectly written or implemented software, or uncontrolled modifications to the software can result in the SIS not responding as desired when required, which the possibility of severe repercussions.


The SRS is taken in line with the safeguards, cause and effects and the software is checked and tested to insure that the desired output is initiated from the specified input.  On addition negative testing should also be conducted to ensure that non-specified inputs do not result in unsafe output states or put the system into a feedback loop preventing the application software being unable to react to the required input initiators being able to put the system into a safe state, this should be conducted prior the Factory Acceptance Test (FAT).


We have assisted clients in the development of the software verification plan to meet the requirements IEC 61508 and when clients have developed prior use for logic solvers IEC 61511.